ADE7758
Address
Default
Data Sheet
[A6:A0]
0x22
Name
IPEAK
R/W 1
R
Length
8
Type 2
U
Value
0
Description
Current Peak Register. This register holds the value of the peak current
waveform that has occurred within a fixed number of half-line cycles. The
number of half-line cycles is set by the LINECYC register.
0x23
Gain
R/W
8
U
0
PGA Gain Register. This register is used to adjust the gain selection for the
PGA in the current and voltage channels (see the Analog Inputs section).
0x24
AVRMSGAIN
R/W
12
S
0
Phase A VRMS Gain Register. The range of the voltage rms calculation can
be adjusted by writing to this register. It has an adjustment range of ±50%
with a resolution of 0.0244%/LSB.
0x25
0x26
0x27
BVRMSGAIN
CVRMSGAIN
AIGAIN
R/W
R/W
R/W
12
12
12
S
S
S
0
0
0
Phase B VRMS Gain Register.
Phase C VRMS Gain Register.
Phase A Current Gain Register. This register is not recommended to be
used and it should be kept at 0, its default value.
0x28
BIGAIN
R/W
12
S
0
Phase B Current Gain Register. This register is not recommended to be
used and it should be kept at 0, its default value.
0x29
CIGAIN
R/W
12
S
0
Phase C Current Gain Register. This register is not recommended to be
used and it should be kept at 0, its default value.
0x2A
AWG
R/W
12
S
0
Phase A Watt Gain Register. The range of the watt calculation can be
adjusted by writing to this register. It has an adjustment range of ±50%
with a resolution of 0.0244%/LSB.
0x2B
0x2C
0x2D
BWG
CWG
AVARG
R/W
R/W
R/W
12
12
12
S
S
S
0
0
0
Phase B Watt Gain Register.
Phase C Watt Gain Register.
Phase A VAR Gain Register. The range of the VAR calculation can be
adjusted by writing to this register. It has an adjustment range of ±50%
with a resolution of 0.0244%/LSB.
0x2E
0x2F
0x30
BVARG
CVARG
AVAG
R/W
R/W
R/W
12
12
12
S
S
S
0
0
0
Phase B VAR Gain Register.
Phase C VAR Gain Register.
Phase A VA Gain Register. The range of the VA calculation can be adjusted
by writing to this register. It has an adjustment range of ±50% with a
resolution of 0.0244%/LSB.
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
BVAG
CVAG
AVRMSOS
BVRMSOS
CVRMSOS
AIRMSOS
BIRMSOS
CIRMSOS
AWATTOS
BWATTOS
CWATTOS
AVAROS
BVAROS
CVAROS
APHCAL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
12
12
12
12
12
12
12
12
12
12
12
12
12
12
7
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Phase B VA Gain Register.
Phase C VA Gain Register.
Phase A Voltage RMS Offset Correction Register.
Phase B Voltage RMS Offset Correction Register.
Phase C Voltage RMS Offset Correction Register.
Phase A Current RMS Offset Correction Register.
Phase B Current RMS Offset Correction Register.
Phase C Current RMS Offset Correction Register.
Phase A Watt Offset Calibration Register.
Phase B Watt Offset Calibration Register.
Phase C Watt Offset Calibration Register.
Phase A VAR Offset Calibration Register.
Phase B VAR Offset Calibration Register.
Phase C VAR Offset Calibration Register.
Phase A Phase Calibration Register. The phase relationship between the
current and voltage channel can be adjusted by writing to this signed
7-bit register (see the Phase Compensation section).
0x40
0x41
0x42
0x43
0x44
BPHCAL
CPHCAL
WDIV
VARDIV
VADIV
R/W
R/W
R/W
R/W
R/W
7
7
8
8
8
S
S
U
U
U
0
0
0
0
0
Phase B Phase Calibration Register.
Phase C Phase Calibration Register.
Active Energy Register Divider.
Reactive Energy Register Divider.
Apparent Energy Register Divider.
Rev. E | Page 62 of 72
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